Physical security threats appear at the chip level, where an attacker can measure or physically influence a cryptographic operation performed by the chip's circuit. The side-channel analysis exploits additional sources of information (called physical observations), including timing, power consumption, or electromagnetic emissions (EM), among others. Malicious data modifications can be caused by fault injection, which can be performed using optical, electromagnetic, power, and clock glitches. These attacks pose a serious threat to modern cryptographic implementations. The project aims to evaluate the security of modern cryptography implemented in Java for JavaCard. As an example of modern cryptography, we will consider Ascon and AES.

The project will start with taking a JavaCard implementation of AES and performing the side-channel attack based on existing attack scripts. The student will improve the efficiency, readability, and usability of these scripts. Subsequently, the student will implement and possibly improve a state-of-the-art side-channel attack against ASCON and execute the attack. The side-channel attack techniques should include Correlation Power Analysis (CPA) and Test Vector Leakage Assessment (TVLA). Optionally, the student will also evaluate side-channel-protected ASCON implementation. 

While the project will be done in cooperation with other researchers, the aforementioned work will be executed solely by the student. 

The initial part of the thesis will require learning how JavaCard works and how to attack AES and ASCON using Correlation Power Analysis (CPA).

The division of the tasks within the projects is approximately: 35% programming, 30% literature study, and 35% lab work.